Galactic Electronics Projects

Build this 4 bit CPU from TTL ICs.

This project is a 4 bit CPU built from TTL counters, latches and gates. Two, 2716 EPROMs are used to store the micro-instruction code and two, 2114 static RAMs are used for program memory. 25 ICs in all. This project is meant to be more educational than be a practical, useful CPU. The design is simple and can be built from readily available TTL ICs.

The programming and control interface is the classic toggle switch / LED type as was the Altair 8800 and IMSAI 8080 microcomputers of the 1970s. This type of interface is simple to design and build. Programming the CPU with this sort of interface isn't as difficult as one may think.

There are three modes of operation set by a rotary switch. These are Program, Reset and Run. For program mode, there is a write button to write the instruction to the address that is indicated by the address toggle switches. (The other button and switch for step and step mode were installed for a previous version of the CPU and are not used here.)

Why did I do this ?

I designed and built a 4 bit CPU for a few reasons. One is that I have always wanted to. Another reason is that I found this cool web site www.HomeBrewCPU.com that presents CPUs designed and built by electronics hobbiests, and this helped motivate me a to actually design and build a CPU. Also, I wanted to design a simple 4 bit CPU to show other electronics hobbiests that designing and building a simple CPU is not difficult to do. A relatively small number of ICs is required even without using PALs or GALs. This 4 bit CPU was designed, built and tested without the aid of a logic analyzer or any hardware simulation software. I only used a logic probe and an oscilloscope.

Overview of the design.

This CPU has 16 instructions. More instructions could have been implemented but 4 bit instructions means 16 is the limit. There is one accumulator and four registers. The registers are the only memory available for a program to store data at runtime. The program space is 256 bytes. 4 bits for the instruction and another 4 bits to store program data. There are three flags, less than, equal to and greater than. A segmented memory model is used. There are 16 segments of 16 bytes. The program will execute in a 16 word segment until a jump is made to another segment. This was done to simplify the design.

Here is a block diagram of the CPU -

Below is a summary of the available instructions -

Code Numonic Description
1 LIT Copy a literal value from program memory to the accumulator.
2 LOAD Copy a value from a register to the accumulator.
3 STORE Copy the value in the accumulator to a register.
4 INC Increment the accumulator by one.
5 DEC Decrement the accumulator by one.
6 REG Copy the value in the accumulator to the register address latch.
7 CMPL Compare the accumulator to a literal value. Sets flags.
8 CMPR Compare the accumulator to a register. Sets flags.
9 RST Resets the program counter.
10 JUMPL Copy the value in the accumulator to the segment register when the less than flag is set.
11 JUMPE Copy the value in the accumulator to the segment register when the equal flag is set.
12 JUMPG Copy the value in the accumulator to the segment register when the greater than flag is set.
13 IN Copy the value from the input to the accumulator.
14 OUT Copy the value in the accumulator to the output latch.
15 NOP No operation.

As you can see, there are 15 instructions shown here instead of 16. One other instruction, FETCH, is used by the micro-instruction logic and should never be used by a program.

Details and schematics.

Shown above is the main circuit board. This is the CPU circuitry and does not include the programming interface. On the left hand side, there is a 16 pin DIP socket that connects to the toggle switches and LEDs for the programming interface. The 8 pin DIP socket is for control - program, reset and run mode and the write button. On the bottom, right hand side of the board are two 4 pin headers that connect to the LED buffers for displaying the flags and accumulator contents.

The CPU was subdivided into 5 schematics. Below are links to an article and schematic for each subdivision.

Clock and micro-instruction logic.
Arithmetic logic unit.
Memory and addressing.
Input / Output.
Programmer and control.
Sample programs.

Construction notes.

The schematics show generic 7400 series TTL part numbers but the CPU was actually constructed using 74LS TTL. I do not recommend using straight 7400 TTL because of power requirements and poor noise immunity, but I suppose it can be done. Switching noise can become a problem when using point to point wiring with 30 guage wire as I used. To ensure a minimum of problems with this project I recommend the following -

Send questions and comments to WireHead@GalacticElectronics.com

(c) Jon Qualey, December 2006

Galactic Electronics Home


Homebuilt CPUs WebRing

JavaScript by Qirien Dhaela

Join the ring?

David Brooks, designer of the Simplex-III homebrew computer, has founded the Homebuilt CPUs Web Ring.  To join, drop Dave a line, mentioning your page's URL. It will then be added to the list. You will also need to copy this code fragment into your page.